发明名称 Semiconductor memory device and semiconductor device
摘要 A semiconductor memory device or a semiconductor device which has high reading accuracy is provided. A bit line, a word line, a memory cell placed in an intersection portion of the bit line and the word line, and a reading circuit electrically connected to the bit line are provided. The memory cell includes a first transistor and an antifuse. The reading circuit includes a pre-charge circuit, a clocked inverter, and a switch. The pre-charge circuit includes a second transistor and a NAND circuit. The semiconductor memory device includes transistor in each of which an oxide semiconductor is used in a channel formation region, as the first transistor and the second transistor.
申请公布号 US8750022(B2) 申请公布日期 2014.06.10
申请号 US201113079032 申请日期 2011.04.04
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Saito Toshihiko;Takahashi Yasuyuki
分类号 G11C7/12 主分类号 G11C7/12
代理机构 代理人
主权项 1. A semiconductor memory device comprising: a memory cell including a first transistor and a memory element; a pre-charge circuit including a second transistor; a clocked inverter; and a switch, wherein a gate of the first transistor is electrically connected to a first line, one of a source and a drain of the first transistor is electrically connected to a second line, and the other of the source and the drain of the first transistor is electrically connected to one electrode of the memory element, wherein one of a source and a drain of the second transistor is electrically connected to a third line, and the other of the source and the drain of the second transistor is electrically connected to one terminal of the switch and an input terminal of the clocked inverter, wherein an output terminal of the clocked inverter is electrically connected to an output signal line, wherein the other terminal of the switch is electrically connected to the second line, wherein a channel formation region of the first transistor and a channel formation region of the second transistor each include an oxide semiconductor, and wherein an off current value of the first transistor is lower than or equal to 10 aA/μm.
地址 Atsugi-shi, Kanagawa-ken JP