Efficient implementation of arrays of structures on SIMT and SIMD architectures

摘要

One embodiment of the present invention sets forth a technique providing an optimized way to allocate and access memory across a plurality of thread/data lanes. Specifically, the device driver receives an instruction targeted to a memory set up as an array of structures of arrays. The device driver computes an address within the memory using information about the number of thread/data lanes and parameters from the instruction itself. The result is a memory allocation and access approach where the device driver properly computes the target address in the memory. Advantageously, processing efficiency is improved where memory in a parallel processing subsystem is internally stored and accessed as an array of structures of arrays, proportional to the SIMT/SIMD group width (the number of threads or lanes per execution group).

主权项

1. A computer-implemented method for accessing data in a data structure stored in a memory, the method comprising:
receiving a memory access instruction that includes a base address of the data structure that corresponds to a first memory location within the memory; computing a first partial offset relative to the base address that is proportional to a position of a target structure of arrays within the data structure; computing a second partial offset by adding to the first partial offset a position of a target structure within the target structure of arrays; computing a third partial offset by adding to the second partial offset a position of a target field within the target structure; and accessing a location within the memory corresponding to the base address plus the third partial offset.