发明名称 Demodulation circuit, demodulation method and receiving apparatus
摘要 A demodulation circuit includes a hard decision process unit and a soft decision process unit. The hard decision process unit is configured to perform a hard decision process using a demodulated signal, and the demodulated signal is a demodulated received signal. The soft decision process unit is configured to determine a range of assignment with respect to a transitioning part in the demodulated signal, calculate a likelihood value of a bit, and perform a soft decision process.
申请公布号 US8750433(B2) 申请公布日期 2014.06.10
申请号 US201213442443 申请日期 2012.04.09
申请人 Fujitsu Limited 发明人 Adachi Naoto;Umeda Masataka
分类号 H04L27/06 主分类号 H04L27/06
代理机构 代理人
主权项 1. A demodulation circuit comprising: a hard decision processor configured to perform a hard decision process using a demodulated signal, the demodulated signal being a demodulated received signal; a soft decision processor configured to determine a range of assignment with respect to a transitioning part in the demodulated signal, calculate a likelihood value of a bit, and perform a soft decision process; and a likelihood value selector configured to select a demapping likelihood value of the bit which is used to calculate the likelihood value, from a plurality of patterns that are prepared in advance, wherein the likelihood value selector selects the pattern based on a modulation method and coding rate of a received signal,the soft decision processor determines the range of assignment according to the pattern selected by the likelihood value selector, and performs the soft decision process, andthe plurality of patterns prepared in advance comprise a pattern that makes the range of assignment larger when the modulation method includes a greater multi-value, and makes the range of assignment larger when the coding rate is lower.
地址 Kawasaki JP