| 摘要 |
FIELD: radio engineering, communication.SUBSTANCE: disclosed is an ultra-high-speed parallel analogue-to-digital converter with a differential input, having N sections of identical architecture. Each of the sections includes a voltage comparator, the first input of which is connected to a first input voltage source through a first reference resistor, and the second input of the voltage comparator is connected to a second input anti-phase voltage source through a second reference resistor, wherein the first input of the voltage comparator is connected to a first reference current source and a first parasitic capacitor, the second input of the voltage comparator is connected to a second reference current source and a second parasitic capacitor. The first reference current source is connected in form of a first current mirror which is matched with a first power supply bus, and a first auxiliary reference current source connected to the input of the first current mirror, wherein the output of the first current mirror is the output of the first reference current source, and the second input anti-phase voltage source is connected to the input of the first current mirror through a first balancing capacitor.EFFECT: multifold expansion of the frequency range of processed analogue-to-digital converter signals by reducing the transmission error of input differential voltages from input voltage sources to voltage comparator inputs.3 cl, 7 dwg |
