发明名称 Variable resistance memory devices having reduced reset current
摘要 A nonvolatile memory device includes a substrate and a first insulating layer on the substrate. The first insulating layer includes a first opening therein. A lower electrode is provided in the first opening and protrudes from a surface of the first insulating layer outside the first opening. An electrode passivation pattern is provided on a sidewall of the lower electrode that protrudes from the surface of the first insulating layer. A second insulating layer is provided on the first insulating layer and includes a second opening therein at least partially exposing the lower electrode. A variable resistance material layer extends into the second opening to contact the lower electrode. The electrode passivation layer electrically separates the sidewall of the lower electrode from the variable resistance material layer. The electrode passivation pattern is formed of a material having an etching selectivity to that of the second insulating layer. Related fabrication methods are also discussed.
申请公布号 US8748884(B2) 申请公布日期 2014.06.10
申请号 US201113081168 申请日期 2011.04.06
申请人 Samsung Electronics Co., Ltd. 发明人 Jeong Ji-Hyun;Oh JaeHee;Joo Heung Jin;Eun Sung-Ho
分类号 H01L29/12 主分类号 H01L29/12
代理机构 代理人
主权项 1. A nonvolatile memory device, comprising: a substrate; a first insulating layer on the substrate and including a first opening therein; a lower electrode in the first opening and protruding from a surface of the first insulating layer outside the first opening; an electrode passivation pattern on a sidewall of the lower electrode that protrudes from the surface of the first insulating layer; a second insulating layer on the first insulating layer and including a second opening therein at least partially exposing the lower electrode, wherein the electrode passivation pattern comprises a material having an etching selectivity to that of the second insulating layer; and a variable resistance material layer extending into the second opening to contact the lower electrode, wherein the electrode passivation pattern electrically separates the sidewall of the lower electrode from the variable resistance material layer.
地址 Suwon-si KR