发明名称 PREVENTION OF WARPAGE IN HANDLING CHIP-ON-WAFER
摘要 <p>PROBLEM TO BE SOLVED: To avoid the risk of yield reduction caused by damage in chip bonding to a thin wafer on which a through silicon via (TSV) is formed or to a thin chip, and to prevent warpage in handling a chip-on-wafer (CoW).SOLUTION: A chip is bonded/sealed prior to thinning a wafer on which a TSV is formed and then, as CoW handling, thinning of the TSV wafer, rear face (bottom face) processing, and fragmentation by dicing are performed. It is difficult to handle a thin wafer on which a TSV is formed or a thin chip but thinning or fragmentation is performed while maintaining the state where a chip is bonded to a non-thinned wafer and a mechanical strength is improved (rigidity is increased) by fixing a support, thereby improving yield of a three-dimensional laminate device.</p>
申请公布号 JP2014107508(A) 申请公布日期 2014.06.09
申请号 JP20120261483 申请日期 2012.11.29
申请人 INTERNATIONAL BUSINESS MASCHINES CORPORATION 发明人 HORIBE AKIHIRO;ORII YASUMITSU
分类号 H01L23/32;H01L21/60 主分类号 H01L23/32
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