发明名称 SENSE AMPLIFIER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a sense amplifier circuit capable of suppressing an occurrence of a read error.SOLUTION: The sense amplifier circuit includes: a first, a second bit lines; inverters IV1, IV2; and switch transistors N2, N3. The inverter IV1 includes a first input end, a first output end and a first power source end, and supplies a potential of the second bit line to the first input end. The inverter IV2 includes a second input end, a second output end and a second power source end, and the second input end is connected to the first output end, the second output end is connected to the first input end, and supplies a potential of the first bit line to the second input end. The switch transistor N2 includes a first gate, and the first power source end is connected to one end of a current path, and supplies the potential of the second bit line to the first gate. The switch transistor N3 includes a second gate, and the second power source end is connected to the one end of the current path, and supplies the potential of the first bit line to the second gate.
申请公布号 JP2014102870(A) 申请公布日期 2014.06.05
申请号 JP20120255532 申请日期 2012.11.21
申请人 TOSHIBA CORP 发明人 NAKAZATO TAKAAKI
分类号 G11C11/419 主分类号 G11C11/419
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