发明名称 CIRCUIT TO PREVENT PEAK POWER PROBLEMS DURING SCAN SHIFT
摘要 <p>PROBLEM TO BE SOLVED: To provide scanning technics.SOLUTION: A chip comprises first and second scan chain segments, and each segment comprises registers and multiplexers to provide scan input signals to the registers during a scan input period and captured output signals during a capture period. The chip also comprises a circuit to provide first and second test clock signals to the registers of the first and second scan chain segments, respectively. The second test clock signal is provided by a signal path in the circuit during the scan input period different from a signal path during the capture period, and during the scan input period a second test clock signal is skewed with respect to a first test clock signal. Other embodiments are described and claimed.</p>
申请公布号 JP2014102254(A) 申请公布日期 2014.06.05
申请号 JP20140000591 申请日期 2014.01.06
申请人 SILICON IMAGE INC 发明人 SUL CHINSONG;KIM HEON
分类号 G01R31/28 主分类号 G01R31/28
代理机构 代理人
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