发明名称 MRAM Smart Bit Write Algorithm with Error Correction Parity Bits
摘要 Some aspects of the present disclosure relate a method. The method attempts to write an expected multi-bit word to a memory location in memory. After writing of the multi-bit word has been attempted, an actual multi-bit word is read from the memory location. The actual multi-bit word is then compared with the expected multi-bit word to identify a number of erroneous bits and a number of correct bits stored in the memory location. The number of erroneous bits is re-written to the memory location without attempting to re-write the correct bits to the memory location.
申请公布号 US2014157088(A1) 申请公布日期 2014.06.05
申请号 US201313917772 申请日期 2013.06.14
申请人 Taiwan Semiconductor Manufacturing Co. Ltd. 发明人 Chih Yue-Der;Yu Hung-Chang;Lin Kai-Chun;Huang Chin-Yi;Tran Laun C.
分类号 G06F11/10;G06F11/14 主分类号 G06F11/10
代理机构 代理人
主权项 1. A method, comprising: (a) attempting to write an expected multi-bit word to a memory location in memory; (b) after attempting to write the multi-bit word, reading an actual multi-bit word from the memory location; (c) comparing the actual multi-bit word with the expected multi-bit word to identify a number of erroneous bits as well as a number of correct bits stored in the memory location; and (d) re-writing the number of erroneous bits to the memory location without attempting to re-write the number of correct bits to the memory location.
地址 Hsin-Chu TW