发明名称 DISPLAY DEVICE
摘要 The plurality of stages of circuit blocks of a driver circuit in a display device include a first transistor and a second transistor. The first transistor is connected at its gate with a first node and controls conductivity between a scanning signal line and a first clock signal line applied with a first clock signal. The first node is at an active potential when at least any one signal of signals output from one stage in each of a forward direction and a reverse direction is at the active potential. The second transistor is connected at its gate with the first node and controls conductivity between the first clock signal line and an input signal line of another stage of circuit block.
申请公布号 US2014152644(A1) 申请公布日期 2014.06.05
申请号 US201314094962 申请日期 2013.12.03
申请人 Japan Display Inc. 发明人 ABE Hiroyuki;SUZUKI Takayuki
分类号 G09G3/36 主分类号 G09G3/36
代理机构 代理人
主权项 1. A display device comprising: a plurality of scanning signal lines disposed in a display area of a rectangle, arranged in parallel with one side of the rectangle, and applied with an active potential as a potential rendering a transistor conductive; and a driver circuit sequentially applying the active potential in selected one direction of a forward direction from one end of the plurality of scanning signal lines arranged in parallel and a reverse direction from the other end of the plurality of scanning signal lines, wherein the driver circuit includes a plurality of stages of circuit blocks as circuits respectively applying the active potential to the plurality of scanning signal lines, portions of the plurality of stages of circuit blocks are arranged to a side of one side of the rectangular display area while the remaining portions are arranged to a side of the other side facing the one side, and at least one stage of circuit block of the plurality of stages of circuit blocks includes a first transistor whose gate is connected to a first node and which controls conductivity between the scanning signal line and a first clock signal line applied with a first clock signal, the first node being at the active potential when at least any one signal of signals output from one stage in each of the forward direction and the reverse direction is at the active potential, anda second transistor whose gate is connected to the first node and which controls conductivity between the first clock signal line and an input signal line of another stage of circuit block.
地址 Tokyo JP