| 摘要 |
<p>The disclosed embodiments comprise a multi-stage circuit (10) operating across different power domains (A, B). The multi-stage circuit may be implemented as a master-slave flip-flop circuit (10c) integrated with a level shifter (65c) that transfers data across different power domains. The master and slave stages of the flip-flop may be split across two tiers (102, 104) of a 3D IC and may include (i) a level shifter across different power domain integrated within the flip-flop circuit, (ii) reduced one-state writing delays by a self-induced power collapsing technique, (iii) splitting flip-flop power supplies in different tiers using monolithic 3D IC technology, and (iv) cross power domain data transfer between 3D IC tiers.</p> |
