| 发明名称 |
ENFORCING A POWER CONSUMPTION DUTY CYCLE IN A PROCESSOR |
| 摘要 |
In an embodiment, a processor includes a plurality of cores each to independently execute instructions, a plurality of graphics engines each to independently perform graphics operations; and, a power control unit coupled to the plurality of cores to control power consumption of the processor, where the power control unit includes a power excursion control logic to limit a power consumption level of the processor from being above a defined power limit for more than a duty cycle portion of an operating period. Other embodiments are described and claimed. |
| 申请公布号 |
US2014157021(A1) |
申请公布日期 |
2014.06.05 |
| 申请号 |
US201213997295 |
申请日期 |
2012.11.30 |
| 申请人 |
Varma Ankush;Sistla Krishnakanth;Rowland Martin T.;Griffith Brian J.;Vogman Viktor D.;Doucette Joseph R.;Dehaemer Eric J.;Garg Vivek;Poirier Chris;Shrall Jeremy J.;Ananthakrishnan Avinash N.;Gunther Stephen H. |
发明人 |
Varma Ankush;Sistla Krishnakanth;Rowland Martin T.;Griffith Brian J.;Vogman Viktor D.;Doucette Joseph R.;Dehaemer Eric J.;Garg Vivek;Poirier Chris;Shrall Jeremy J.;Ananthakrishnan Avinash N.;Gunther Stephen H. |
| 分类号 |
G06F1/32 |
主分类号 |
G06F1/32 |
| 代理机构 |
|
代理人 |
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| 主权项 |
1. A processor comprising:
a plurality of cores each to independently execute instructions; and a power control unit (PCU) coupled to the plurality of cores to control power consumption of the processor, the PCU including a power excursion control logic to limit a power consumption level of the processor from being above a defined power limit for more than a duty cycle portion of an operating period.
|
| 地址 |
Hillsboro OR US |
