发明名称 |
SELF EVALUATION OF SYSTEM ON A CHIP WITH MULTIPLE CORES |
摘要 |
A method and structure tests a system on a chip (SoC) or other integrated circuit having multiple cores for chip characterization to produce a partial good status. A Self Evaluation Engine (SEE) on each core creates a quality metric or partial good value for the core. The SEE executes one or more tests to create a characterization signature for the core. The SEE then compares the characterization signature of a core with a characterization signature of neighboring cores to determine the partial good value for the core. The SEE may output a result to create a full characterization map for detailed diagnostics or a partial good map with values for all cores to produce a partial good status for the entire SoC. |
申请公布号 |
US2014157073(A1) |
申请公布日期 |
2014.06.05 |
申请号 |
US201213707365 |
申请日期 |
2012.12.06 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
Douskey Steven M.;Fitch Ryan A.;Hamilton Michael J.;Kaufer Amanda R. |
分类号 |
G01R31/3177 |
主分类号 |
G01R31/3177 |
代理机构 |
|
代理人 |
|
主权项 |
1. A method for testing cores on an integrated circuit comprising:
each core of a plurality of cores performing the steps of:
producing a local signature that characterizes a local core, wherein each core of the plurality of cores is considered the local core;comparing the local signature to neighbor core signatures of a plurality of neighbor cores; andproducing a goodness value for the local core based on comparing the local signature to the plurality of neighbor core signatures.
|
地址 |
Armonk NY US |