Memory controller for strobe-based memory systems

摘要

A memory controller for strobe-based memory systems is disclosed. The memory controller includes a circuit to generate a control signal having a predetermined timing relationship with respect to a first clock signal, a circuit to receive the control signal, and a receiver to sample the read data in response to the qualified read strobe signal. The receiving circuit includes an input to receive an external read strobe signal transmitted by a semiconductor memory device, circuitry to synchronize the control signal and the received read strobe signal to have a common timing relationship with respect to each other, and circuitry to gate the read strobe signal based on the synchronized control signal.

主权项

1. A memory controller comprising:
a circuit to generate a control signal having a predetermined timing relationship with respect to a first clock signal; a circuit to receive the control signal, the circuit to receive comprising:
an input to receive an external read strobe signal, wherein the read strobe signal is transmitted by a semiconductor memory device and is transmitted according to a predetermined phase relationship with read data transmitted by the semiconductor memory device;circuitry to synchronize the control signal and the received read strobe signal to have a common timing relationship with respect to each other; andcircuitry to gate the read strobe signal based on the synchronized control signal, the circuitry to gate the read strobe signal to generate a qualified read strobe signal according to strobe transitions that correspond to valid read data of the read data; and a receiver to sample the read data in response to the qualified read strobe signal.