Decision feedback equalizing method and equalizer

摘要

A decision feedback equalizer is provided for correcting ISI on a first postcursor without using received decision data of a preceding bit. The decision feedback equalizer includes an amplifying circuit that is to be supplied with received data, a duobinary signal decision device for determining an output signal from the amplifying circuit, the duobinary signal decision device including a flip-flop, a shift register for successively shifting a decision result held by the flip-flop, and a plurality of current control blocks that are to be supplied with respective output signals from the shift register, and feeding back output signals to an output terminal of the amplifier to control the potential thereof.

主权项

1. A decision feedback equalizer comprising:
an amplifying circuit supplied with received data; a duobinary signal decision device determining an output signal from said amplifying circuit, said duobinary signal decision device including a first D flip-flop and a second D flip-flop, said first D flip-flop supplied with said output signal and a high reference potential and outputting a result of a comparison between the high reference potential and said output signal, and said second D flip-flop supplied with said output signal and a low reference potential and outputting a result of a comparison between the low reference signal and said output signal; a first shift register for successively shifting the result output by said first D flip-flop; a second shift register for successively shifting the result output by said second D flip-flop; and a plurality of current control blocks supplied with respective output signals from said first shift register and with respective output signals from said second shift register and for feeding back output signals to an output terminal of said amplifying circuit to control the potential thereof.