发明名称 |
Integrated 3-dimensional electromagnetic element arrays |
摘要 |
Systems and methods for constructing integrated three dimensional electromagnetic element arrays using a bulk resonator are illustrated. In several embodiments, the integrated three dimensional electromagnetic element arrays include electromagnetic elements buried within the bulk resonator. In many embodiments, inclusion of a third dimension in the electromagnetic element array can alleviate or eliminate the trade-offs that are experienced in conventional integrated antennas by using the third physical dimension to provide an additional degree of freedom to manipulate electromagnetic boundary conditions in the near-field of the substrate, affecting both the resulting electromagnetic near- and far-fields. In several embodiments, three dimensional electromagnetic element arrays are formed by mechanically stacking substrates on which integrated planar circuits are formed (i.e. chips) using conventional die stacking techniques. |
申请公布号 |
US8742989(B2) |
申请公布日期 |
2014.06.03 |
申请号 |
US201113118188 |
申请日期 |
2011.05.27 |
申请人 |
California Institute of Technology |
发明人 |
Bohn Florian;Hajimiri Seyed Ali |
分类号 |
H01Q1/38 |
主分类号 |
H01Q1/38 |
代理机构 |
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代理人 |
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主权项 |
1. An integrated 3-dimensional electromagnetic element array, comprising:
a first planar integrated circuit, where the first planar integrated circuit comprises at least a first integrated electromagnetic element; and at least a second planar integrated circuit located on a different plane to the first planar integrated circuit, where the second planar integrated circuit comprises at least a second integrated electromagnetic element; wherein the first and second integrated electromagnetic elements are configured to control the near- and far-field pattern produced by the 3-dimensional electromagnetic element array; wherein the bulk resonator comprises a die stack; wherein the first planar integrated circuit is located on a first semiconductor substrate within the die stack; and wherein the second planar integrated circuit is located on a second semiconductor substrate within the die stack.
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地址 |
Pasadena CA US |