发明名称 Method of manufacturing semiconductor device and semiconductor device
摘要 Techniques capable of improving the yield of IGBTs capable of reducing steady loss, turn-off time, and turn-off loss are provided. Upon formation of openings in an interlayer insulting film formed on a main surface of a substrate, etching of a laminated insulating film of a PSG film and an SOG film and a silicon oxide film is once stopped at a silicon nitride film. Then, the silicon nitride film and the silicon oxide film are sequentially etched to form the openings. As a result, the openings are prevented from penetrating through an n-type source layer and a p+-type emitter layer having a thickness of 20 to 100 nm and reaching the substrate.
申请公布号 US8741699(B2) 申请公布日期 2014.06.03
申请号 US201213479360 申请日期 2012.05.24
申请人 Renesas Electronics Corporation 发明人 Arai Daisuke;Nakazawa Yoshito;Hara Ikuo;Kachi Tsuyoshi;Hoshino Yoshinori;Tabata Tsuyoshi
分类号 H01L21/332 主分类号 H01L21/332
代理机构 代理人
主权项 1. A method of manufacturing a semiconductor device having an active portion and a peripheral portion outside the active portion and having elements of an IGBT formed in the active portion, the method comprising the steps of: (a) preparing a substrate exhibiting n-type conductivity type that is to serve as a base layer of the IGBT; (b) forming a first insulating film on a main surface of the substrate, the first insulating film including a plurality of thick-film portions having a first thickness and a thin-film portion having a second thickness smaller than the first thickness; (c) forming a spacing portion in the thin-film portion of the first insulating film, the spacing portion reaching the substrate; (d) forming a surface semiconductor layer exhibiting n-type conductivity type on the thin-film portion of the first insulating film by burying the spacing portion, the surface semiconductor layer having a thickness of 20 to 100 nm; (e) forming a channel layer exhibiting p-type conductivity type of the IGBT in the surface semiconductor layer of the active portion; (f) forming an emitter layer exhibiting p-type conductivity type of the IGBT in the surface semiconductor layer of the active portion so that the emitter layer is in contact with the channel layer, the emitter layer having a higher concentration than the channel layer; (g) forming a gate insulating film of the IGBT on a surface of the surface semiconductor layer of the active portion; (h) forming a gate electrode of the IGBT on the gate insulating film; (i) introducing an impurity exhibiting n-type conductivity type into the surface semiconductor layer of the active portion to form a first source layer of the IGBT in the surface semiconductor layer on both sides of the gate electrode; (j) forming a sidewall on a side surface of the gate electrode; (k) introducing an impurity exhibiting n-type conductivity type into the surface semiconductor layer of the active portion to form a second source layer of the IGBT in the surface semiconductor layer on both sides of the sidewall, the second source layer having a higher concentration than the first source layer; (l) forming an interlayer insulating film on the main surface of the substrate, the interlayer insulating film composed of a first oxide film, a nitride film, and a second oxide film; (m) etching the second oxide film with using the nitride film as an etching stopper and then sequentially etching the nitride film and the first oxide film to form, in the interlayer insulating film, openings reaching the emitter layer and the second source layer; (n) forming an emitter electrode of the IGBT on the emitter layer and the second source layer, the emitter electrode electrically connected to the emitter layer and the second source layer; (o) reducing the thickness of the substrate from a back surface to form the base layer of the IGBT; (p) forming an buffer layer exhibiting n-type conductivity type of the IGBT on the back surface of the substrate; (q) forming a collector layer exhibiting p-type conductivity type of the IGBT on the back surface of the substrate; and (r) forming a collector electrode of the IGBT electrically connected to the collector layer.
地址 Kawasaki-shi JP