| 发明名称 |
Semiconductor integrated circuit adapted to output pass/fail results of internal operations |
| 摘要 |
In a semiconductor integrated circuit, an internal circuit is capable of executing a first operation and a second operation concurrently, and an output circuit outputs to the outside of the semiconductor integrated circuit information indicating whether or not the first operation is being executed and information indicating whether or not the second operation is executable. |
| 申请公布号 |
US8743625(B2) |
申请公布日期 |
2014.06.03 |
| 申请号 |
US201313901093 |
申请日期 |
2013.05.23 |
| 申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Nakamura Hiroshi;Imamiya Kenichi;Yamamura Toshio;Hosono Koji;Kawai Koichi |
| 分类号 |
G11C7/10 |
主分类号 |
G11C7/10 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An operating method of a semiconductor integrated circuit comprising:
performing a first operation and a second operation, wherein the first operation is performed in response to an input of one of a first command and a first command sequence, the second operation is performed in response to an input of one of a second command and a second command sequence, and outputting to outside of the semiconductor integrated circuit first information indicating whether or not the first operation is being executed and information indicating whether or not the second operation is executable.
|
| 地址 |
Minato-ku JP |
