High linearity hybrid transistor device

摘要

A hybrid transistor device is provided. In one example case, the device includes a substrate, an oxide layer formed on the substrate, and a wide-bandgap body material formed between a portion of the oxide layer and a gate dielectric layer. The wide-bandgap body material has an energy bandgap higher than that of silicon. The device includes source-drain/emitter material formed on the oxide layer adjacent to the wide-bandgap body material so as to define a hetero-structure interface where the source-drain/emitter material contacts the wide-bandgap body material. The device includes a gate material formed over the gate dielectric layer, a base material formed over a portion of the source-drain/emitter material, and a collector material formed over a portion of the base material. The source-drain/emitter material is shared so as to electrically combine a drain of a first transistor type portion of the device and an emitter of a second transistor type portion.

主权项

1. A hybrid transistor device, comprising:
a substrate; an oxide layer formed on the substrate; a wide-bandgap body material formed between a portion of the oxide layer and a gate dielectric layer, the wide-bandgap body material having an energy bandgap higher than that of silicon; source-drain/emitter material formed on the oxide layer adjacent to the wide-bandgap body material so as to define a hetero-structure interface where the source-drain/emitter material contacts the wide-bandgap body material; a gate material formed over the gate dielectric layer; a base material formed over a portion of the source-drain/emitter material; and a collector material formed over a portion of the base material; wherein the source-drain/emitter material is shared so as to electrically combine a drain of a first transistor type portion of the device and an emitter of a second transistor type portion of the device.