Test circuitry coupled to embedded circuit input/output unconnected to pads

摘要

Timely testing of die on wafer reduces the cost to manufacture ICs. This disclosure describes a die test structure and process to reduce test time by adding test pads on the top surface of the die. The added test pads allow a tester to probe and test more circuits within the die simultaneously. Also, the added test pads contribute to a reduction in the amount of test wiring overhead traditionally required to access and test circuits within a die, thus reducing die size.

主权项

1. A die of semiconductor material, comprising:
A. die pads arranged at the periphery of the die; B. a first embedded circuit having functional inputs and outputs, at least one of the functional inputs and at least one of the functional outputs being unconnected to a die pad; C. test circuitry coupled to the one of the functional inputs of the first embedded circuit that is unconnected to a die pad, the one of the functional outputs of the first embedded circuit that is unconnected to a die pad; and the test circuitry having an enable input; and D. test enable circuitry having an input connected to an enable test pad, separate from the die pads, and an output coupled to the test circuitry enable input.