High-speed data reception circuitry and methods

摘要

Equalization circuitry for receiving a digital data signal includes both feed-forward equalizer (“FFE”) circuitry and decision-feedback equalizer (“DFE”) circuitry. The FFE circuitry may be used to give the DFE circuitry a signal that is at least minimally adequate for proper start-up of the DFE circuitry. Thereafter, more of the burden of the equalization task may be shifted from the FFE circuitry to the DFE circuitry.

主权项

1. Equalization circuitry comprising:
selection circuitry operative to select either a first coefficient value received from control circuitry while the control circuitry is adapting to an input signal or a second coefficient value received from logic circuitry when an indication of stability is received by the logic circuitry, wherein:
buffer circuitry, coupled between an input of the control circuitry and the input signal, provides an error signal that indicates an amount of deviation of characteristics of the input signal and reference characteristics to the control circuitry;the first coefficient value changes as the control circuitry adapts to the input signal;the control circuitry provides the changing first coefficient value to the logic circuitry; andthe second coefficient value is equal to a value of the changing first coefficient value last received by the logic circuitry when the logic circuitry received the indication of stability, wherein a third coefficient value that corresponds to the second coefficient value is applied to a decision-feedback equalization that is disabled while the control circuitry is adapting a first time to the input signal when the indication of stability is received by the logic circuitry.