发明名称 Semiconductor device
摘要 A semiconductor device is provided, in which work of a parasitic bipolar transistor can be suppressed and a potential difference can be provided between a source region and a back gate region. A high voltage tolerant transistor formed over a semiconductor substrate includes: a well region of a first conductivity type; a first impurity region as the source region; and a second impurity region as a drain region. The semiconductor device further includes a third impurity region and a gate electrode for isolation. The third impurity region is formed, in planar view, between a pair of the first impurity regions, and from which a potential of the well region is extracted. The gate electrode for isolation is formed over the main surface between the first impurity region and the third impurity region.
申请公布号 US8742497(B2) 申请公布日期 2014.06.03
申请号 US201313861005 申请日期 2013.04.11
申请人 Renesas Electronics Corporation 发明人 Sayama Hirokazu
分类号 H01L29/66 主分类号 H01L29/66
代理机构 代理人
主权项 1. A semiconductor device comprising a high voltage tolerant transistor, wherein the high voltage tolerant transistor includes: a semiconductor substrate having a main surface; a well region of a first conductivity type formed over the main surface; a plurality of first impurity regions of a second conductivity type, each of which is formed over the main surface in the well region and from each of which a source electrode is extracted; and a second impurity region of a second conductivity type formed over the main surface so as to be adjacent to each of the first impurity regions, from which a drain electrode is extracted, and wherein the semiconductor device comprises: a third impurity region of the first conductivity type formed over the main surface located, in planar view, between a pair of the first impurity regions and in the well region, from which a potential of the well region is extracted, and a gate electrode for isolation formed over the main surface between the first impurity region and the third impurity region.
地址 Kanagawa JP