主权项 |
1. An apparatus, comprising:
a PMOS transistor and an NMOS transistor coupled together for current reuse and configured to provide differential oscillator outputs; a common mode rejection (CMR) circuit coupled between the PMOS and the NMOS transistors, the CMR circuit including:
an inductor having a least one tap that can be selectively coupled to a ground to reduce common mode signals at the differential oscillator outputs;at least one capacitor connected to the at least one tap, respectively; andat least one switch connected between the ground and the at least one capacitor, respectively, each switch configured to connect and disconnect its associated capacitor to the ground in response to a control signal.
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