发明名称 Memory device and semiconductor device using the same
摘要 A memory device whose speed at the time of operation such as writing or reading is high and whose number of semiconductor elements per memory cell is small is provided. The memory device includes a control unit, an arithmetic unit, and a buffer memory device. The buffer memory device stores data sent from a main memory device and/or the arithmetic unit, in accordance with an instruction from the control unit. The buffer memory device includes a plurality of memory cells. The memory cells each include a transistor including a channel formation region including an oxide semiconductor, and a memory element to which charge with an amount in accordance with a value of the data is supplied through the transistor. Further, a data retention time of the memory cell corresponding to a valid bit is shorter than a data retention time of the memory cell corresponding to a data field.
申请公布号 US8743590(B2) 申请公布日期 2014.06.03
申请号 US201213440093 申请日期 2012.04.05
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Kurokawa Yoshiyuki
分类号 G11C11/24 主分类号 G11C11/24
代理机构 代理人
主权项 1. A memory device comprising: a first memory cell and a second memory cell each comprising: a first transistor; anda memory element to which charge with an amount in accordance with data is supplied through the first transistor, wherein the first memory cell corresponds to a valid bit, wherein the second memory cell corresponds to a data field, and wherein a retention time of the first memory cell is shorter than a retention time of the second memory cell.
地址 Atsugi-shi, Kanagawa-ken JP