发明名称 |
Correlated double sampling circuit, method thereof and devices having the same |
摘要 |
A CDS circuit is provided. The CDS circuit includes a signal compressor which compresses each of a pixel signal and a ramp signal using capacitive dividing and outputs a compressed pixel signal and a compressed ramp signal, and a comparator which compares the compressed pixel signal with the compressed ramp signal and outputs a comparative signal corresponding to a comparison result. |
申请公布号 |
US8743258(B2) |
申请公布日期 |
2014.06.03 |
申请号 |
US201113239035 |
申请日期 |
2011.09.21 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Park Yu Jin;Seo Jin Ho;Ham Seog Heon;Lee Kwang Hyun;Yang Han |
分类号 |
H04N5/335 |
主分类号 |
H04N5/335 |
代理机构 |
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代理人 |
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主权项 |
1. A correlated double sampling (CDS) circuit comprising:
a signal compressor which compresses each of a pixel signal and a ramp signal using capacitive dividing and outputs a compressed pixel signal and a compressed ramp signal; and a comparator which compares the compressed pixel signal with the compressed ramp signal and outputs a comparative signal corresponding to a comparison result, wherein the signal compressor comprises: a plurality of first capacitors; a plurality of second capacitors; and a switch arrangement which, in response to a switch control signal, at least one of:
connects the plurality of first capacitors in series between a pixel signal output node and a ground to compress the pixel signal and connects the plurality of second capacitors in series between a ramp signal output node and the ground to compress the ramp signal, orconnects the plurality of first capacitors in parallel between the pixel signal output node and a first input node of the comparator and connects the plurality of second capacitors in parallel between the ramp signal output node and a second input node of the comparator.
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地址 |
Suwon-si KR |