发明名称 PLL (phase-locked loop)
摘要 One embodiment provides a phase-locked loop (PLL), in which a sequencer controls a loop filter such that, when a signal indicating turning-off of a power supply of the PLL is input thereto, or when a signal indicating turning-on of the power supply of the PLL is input thereto, a resistance value of a first resistance change device in the loop filter is a first resistance value, and that, after the PLL is stabilized, the resistance value of the first resistance change device is a second resistance value which is higher than the first resistance value.
申请公布号 US8742810(B2) 申请公布日期 2014.06.03
申请号 US201213461101 申请日期 2012.05.01
申请人 Kabushiki Kaisha Toshiba 发明人 Noguchi Hiroki;Abe Keiko;Yasuda Shinichi;Fujita Shinobu
分类号 H03L7/06 主分类号 H03L7/06
代理机构 代理人
主权项 1. A phase-locked loop (PLL), comprising: a phase detector configured to detect a phase difference between a reference signal and a feedback signal and output a first signal based on the phase difference; a charge pump configured to generate electric-current based on the first signal; a loop filter, connected to the charge pump, configured to output a second signal converted from the electric current, the loop filter having a first resistance change device; a voltage-controlled oscillator (VCO) configured to control an output frequency thereof according to the second signal input thereto from the loop filter; a frequency divider configured to perform frequency-dividing of an output signal of the VCO and to generate the feedback signal to be input to the phase detector; and a sequencer configured to control the loop filter such that: a resistance value of the first resistance change device is set to a first resistance value, upon receipt of a signal indicating turning on of the power supply of the PLL or a signal indicating turning off of the power supply of the PLL; andthe resistance value of the first resistance change device is set to a second resistance value which is higher than the first resistance value upon detection of convergence of the output frequency to a predetermined range; wherein the loop filter further has: a first switch and a second switch connected to a first end of the charge pump;a third switch connected between a second end of the charge pump and the first switch; anda fourth switch connected between the second end of the charge pump and the second switch, wherein the first resistance change device has one end connected to the first switch and the third switch and the other end connected to the second switch and the fourth switch; and wherein the sequencer supplies control signals to the first to fourth switches in accordance with the resistance value to be written to the first resistance change device.
地址 Tokyo JP