System and method of controlling power in a multi-threaded processor

摘要

A multithreaded processor device is disclosed and includes a plurality of execution units to execute a plurality of program threads and includes a global low power detection circuit. The global low power detection circuit includes an input that is responsive to each of the plurality of program threads. The input indicates an execution activity level for each of the plurality of program threads. The global low power detection circuit further comprises logic to evaluate the activity level of each of the plurality of program threads. The logic provides a power level signal. Additionally, the global low power detection circuit includes an output that is responsive to the power level signal. The output is coupled to one or more global resources within the multithreaded processor and the output selectively controls an amount of power provided to the one or more global resources.

主权项

1. A multithreaded processor device comprising:
a plurality of execution units to execute a plurality of program threads; one or more global resources shared by the plurality of program threads; and a global low power detection circuit comprising:
a plurality of inputs responsive to the plurality of program threads, the plurality of inputs indicating an execution activity level of each of the plurality of program threads;logic operative to evaluate the execution activity level of each of the plurality of program threads, wherein the logic is further operative to generate a power level signal based on an evaluated execution activity level of a particular thread of the plurality of program threads; andan output responsive to the power level signal, wherein the output selectively controls an amount of power provided to the one or more global resources based on the power level signal, and wherein the one or more global resources do not include any of the plurality of execution units,wherein the global low power detection circuit outputs a global power off signal when the plurality of inputs indicates that each of the plurality of program threads will remain in a sleep mode for a number of cycles that exceeds a threshold.