Recessed and embedded die coreless package

摘要

Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include forming a cavity in a plating material to hold a die, attaching the die in the cavity, forming a dielectric material adjacent the die, forming vias in the dielectric material adjacent the die, forming PoP lands in the vias, forming interconnects in the vias, and then removing the plating material to expose the PoP lands and die, wherein the die is disposed above the PoP lands.

主权项

1. A structure, comprising:
a partially embedded die disposed in a coreless substrate, wherein the partially embedded die includes a top surface and a bottom/active surface; wherein the coreless substrate includes a dielectric material having a planar top portion and having a fillet structure that is raised in relation to the dielectric material planar top portion, wherein the fillet structure of the dielectric material has a sloped portion extending from the planar top portion to a position adjacent the partially embedded die top surface without extending onto the partially embedded die top surface, and wherein the fillet structure is adjacent to a sidewall of the partially embedded die; and raised PoP lands adjacent the partially embedded die on the dielectric material planar top portion of the coreless substrate, wherein the PoP lands are capable of receiving a second substrate.