发明名称 Local interconnects compatible with replacement gate structures
摘要 After forming replacement gate structures that are embedded in a planarized dielectric layer on a semiconductor substrate, a contact-level dielectric layer is deposited over a planar surface of the planarized dielectric layer and the replacement gate structures. Substrate contact via holes are formed through the contact-level dielectric layer and the planarized dielectric layer, and metal semiconductor alloy portions are formed on exposed semiconductor materials. Gate contact via holes are subsequently formed through the contact-level dielectric layer. The substrate contact via holes and the gate contact via holes are simultaneously filled with a conductive material to form substrate contact structures and gate contact structures. The substrate contact structures and gate contact structures can be employed to provide local interconnect structures that provide electrical connections between two components that are laterally spaced on the semiconductor substrate.
申请公布号 US8741718(B2) 申请公布日期 2014.06.03
申请号 US201213351294 申请日期 2012.01.17
申请人 International Business Machines Corporation 发明人 Sardesai Viraj Y.
分类号 H01L21/336 主分类号 H01L21/336
代理机构 代理人
主权项 1. A method of forming a semiconductor structure comprising: forming a gate-level layer on a semiconductor substrate, wherein a planar top surface of said gate-level layer extends over an entirety of said gate-level layer, and gate stacks of a gate dielectric and a gate electrode, gate spacers, and a planarized dielectric layer complimentarily fill portions of said gate-level layer that is within a distance from said planar top surface of said gate-level layer; forming a contact-level dielectric layer over said gate-level layer; forming a substrate contact via hole through a portion of said contact-level dielectric layer and a portion of said planarized dielectric layer to a semiconductor material portion located in or directly on said semiconductor substrate; forming a metal semiconductor alloy portion on said semiconductor material portion; forming a gate contact via hole through another portion of said contact-level dielectric layer overlying one of said gate electrodes; and forming a substrate contact structure directly on said metal semiconductor alloy portion and a gate contact structure directly on said one of said gate electrodes.
地址 Armonk NY US