发明名称 SOLID STATE DRIVE ARCHITECTURES
摘要 A solid state drive includes DRAM logical flash and flash memory, in which system processor reads and writes only to the DRAM logical flash which minimizes writes to the flash memory. A method for operation of a solid state flash device includes writing, by a CPU, to a solid state drive by sending commands and data to DRAM logical flash using flash commands and formatting.
申请公布号 WO2014081719(A1) 申请公布日期 2014.05.30
申请号 WO2013US70789 申请日期 2013.11.19
申请人 PEDDLE, CHARLES I. 发明人 PEDDLE, CHARLES I.;SNELGROVE, MARTIN;MCKENZIE, ROBERT;SNELGROVE, XAVIER
分类号 G11C16/00;H01L27/00 主分类号 G11C16/00
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