发明名称 CONFIGURATION FOR POWER REDUCTION IN DRAM
摘要 Disclosed embodiments may include an apparatus having a segment wordline enable coupled to logic to selectively disable ones of a number of segment wordline drivers. The logic may partition a page of the apparatus to reduce power consumed through activation of the disabled ones of the number of segment wordlines. Other embodiments may be disclosed.
申请公布号 WO2014004104(A3) 申请公布日期 2014.05.30
申请号 WO2013US45739 申请日期 2013.06.13
申请人 INTEL CORPORATION;SCHAEFER, ANDRE;HALBERT, JOHN B. 发明人 SCHAEFER, ANDRE;HALBERT, JOHN B.
分类号 G11C11/4074 主分类号 G11C11/4074
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