发明名称 PROCESSOR CORE ARRANGEMENT, COMPUTING SYSTEM AND METHODS FOR DESIGNING AND OPERATING A PROCESSOR CORE ARRANGEMENT
摘要 <p>The invention relates to a method of designing a processor core arrangement (10) which comprises a first processor core (12) for operation at a first operation frequency and having an associated first leakage and a second processor core (12) for operation at a second operation frequency lower than the first operation frequency and having an associated second leakage lower than the first leakage. The processor core arrangement (10) is capable of switching from the first processor core (12) to the second processor core (14) and vice versa. The method comprises: simulating said processor core arrangement to determine a reference leakage of said first processor core and said second processor core, said first processor core having an SRPG feature in said simulation; and setting said second operation frequency such that the sum of said first leakage and said second leakage is substantially equal to said reference leakage. The method further comprises providing said first processor core (12) and said second processor core (14) but not providing said SRPG feature.</p>
申请公布号 WO2014080244(A1) 申请公布日期 2014.05.30
申请号 WO2012IB56630 申请日期 2012.11.22
申请人 FREESCALE SEMICONDUCTOR, INC.;ROZEN, ANTON;PRIEL, MICHAEL;SMOLYANSKY, LEONID;SOFER, SERGEY 发明人 ROZEN, ANTON;PRIEL, MICHAEL;SMOLYANSKY, LEONID;SOFER, SERGEY
分类号 G06F9/46;G06F9/455 主分类号 G06F9/46
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