发明名称 FAST FOURIER TRANSFORM CIRCUIT, FAST FOURIER TRANSFORM PROCESSING METHOD, AND PROGRAM RECORDING MEDIUM
摘要 <p>A fast Fourier transform circuit equipped with a first and a second butterfly circuit that perform butterfly calculations corresponding to mutually different calculation bit lengths, and equipped with a control means that selectively controls the operation of the first and second butterfly circuits in accordance with any of multiple operation modes, including a first operation mode wherein a calculation is performed with both the first and the second butterfly circuit, and a second operation mode wherein a calculation is performed with only the first or only the second butterfly circuit.</p>
申请公布号 WO2014080617(A1) 申请公布日期 2014.05.30
申请号 WO2013JP06787 申请日期 2013.11.19
申请人 NEC CORPORATION 发明人 SHIBAYAMA, ATSUFUMI
分类号 G06F17/14 主分类号 G06F17/14
代理机构 代理人
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