| 摘要 |
<p>According to an embodiment, a cache management device is equipped with a first control means and a second control means. With respect to each block in a cache memory the first control means appends address information of the corresponding region in the main memory, a flag indicating whether the data in the block is dirty or clean with respect to the data in the corresponding region in the main memory, and the number of error bits of the data read from the corresponding region in the main memory. For each block in the cache memory to which the first control means has appended a dirty flag, the second control means deletes data beginning with the block for which the appended number of error bits is the largest.</p> |
