| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a semiconductor apparatus which is capable of improving insulation destruction voltage resistance during OFF and further capable of controlling channel characteristics, and a manufacturing method thereof.SOLUTION: On an nSiC substrate 5, an nSiC epitaxial layer 8 is formed which has a body region 12, a drift region 13 and a source region 14, and a gate trench 15 is formed which passes through the source region 14 and the body region 12 and reaches the drift region 13. A gate electrode 23 is buried through a gate insulating film 22 into the gate trench 15. A gate pressure resistance holding region 27 is then formed along the grid-shaped gate trenches 15. The gate voltage resistance holding region 27 integrally includes a first region 29 formed in an intersection 17 of the gate trenches 15 and a second region 30 formed to a linear portion 16 of the gate trench 15.</p> |
