SEMICONDUCTOR INTEGRATED CIRCUIT WAFER AND METHOD FOR TESTING SEMICONDUCTOR INTEGRATED CIRCUIT CHIP AND SEMICONDUCTOR INTEGRATED CIRCUIT WAFER

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit wafer capable of reducing bonding failures and improving connection reliability without leaving a scar on a bonding pad.SOLUTION: A semiconductor integrated circuit wafer comprises: a semiconductor integrated circuit region 2a; a scribe region 3; a BIST circuit 4 provided in the scribe region; a connection wiring 9 which connects a semiconductor integrated circuit 2 and the BIST circuit 4; a BIST switching signal input pad 7; and a BIST switching circuit 8 driven by a driving signal from the BIST switching signal input pad 7. The BIST switching circuit 8 further comprises: an input/output pad 6 for a semiconductor integrated circuit; a circuit wiring 11 which connects the input/output pad 6 and the semiconductor integrated circuit 2; and a switch element 10 provided in the middle of the circuit wiring 11 and driven by a driving signal from the BIST switching signal input pad 7.