发明名称 Method for manufacturing a normally blocked heterojunction transistor
摘要 <p>P-type dopants are implanted to form an implanted area (81) on a layer (41), an upper portion of the layer and implanted area is removed by maintaining vapor phase epitaxy conditions, removal is stopped when density of dopant is maximum, a layer (42) is formed on implanted area and layer (41) by vapor phase epitaxy. A layer (6) is formed by vapor phase epitaxy to form an electron gas layer (5) on an interface between the layers (41, 42), and a control gate (73) is formed on the layer (6) plumb with the implanted area to obtain a heterojunction field-effect transistor (1). P-type dopants are implanted to form an implanted area on a layer (41), an upper portion of the layer and implanted area is removed by maintaining vapor phase epitaxy conditions, removal is stopped when the density of dopant is maximum, a layer (42) is formed on the implanted area and the layer (41) by vapor phase epitaxy. A layer (6) is formed by vapor phase epitaxy to form an electron gas layer on an interface between the layers, and a control gate is formed on the layer (6) plumb with the implanted area to obtain a heterojunction field-effect transistor. The layers are made of III-V semiconductor alloy.</p>
申请公布号 EP2736079(A2) 申请公布日期 2014.05.28
申请号 EP20130194322 申请日期 2013.11.25
申请人 COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIESALTERNATIVES 发明人 CHARLES, MATTHEW
分类号 H01L29/778;H01L21/335 主分类号 H01L29/778
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