MULTI CHIP SEMICONDUCTOR APPRATUS

摘要

The present invention relates to a semiconductor layout. More particularly, the present invention relates to the layout of a power supply line in a multi-chip semiconductor apparatus. The multi-chip semiconductor apparatus includes a first region where at least one column which comprises a first external power supply through electrode and a first ground power supply through electrode is alternately arranged; and a second region where second external power supply through electrode columns and a second ground power supply through electrode column are alternately arranged. The distance between the through electrodes of the through electrode column of the second region is preset times greater than the distance between the through electrodes arranged in the first region.