发明名称 EQUALIZER AND OPERATING METHOD THEREOF
摘要 The present invention provides an equalizer capable of removing the influence of a post cursor and reducing phasing time while reducing the size of hardware and an operation method for the same. The equalizer includes a sampler sampling enhanced data rates for global evolution and data in an input signal or a guide signal guided from the input signal; a clock generation unit determining sampling timing of the data or sampling timing of the enhanced data rates for global evolution from the enhanced data rates for global evolution and the data; and a control unit controlling the sampling timing of the data and the sampling timing of the enhanced data rates for global evolution according to the data and the enhanced data rates for global evolution.
申请公布号 KR20140063184(A) 申请公布日期 2014.05.27
申请号 KR20120130239 申请日期 2012.11.16
申请人 SK HYNIX INC.;SNU R&DB FOUNDATION 发明人 YE, SEOK MIN;JEONG, DEOG KYOON
分类号 H04L27/01 主分类号 H04L27/01
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