发明名称 Digital signal processing for PLC communications having communication frequencies
摘要 Aspects of the present disclosure are directed toward receiver devices and methods of using receiver devices. One such method can include converting, using an analog-to-digital converter (ADC), and an analog input signal from power distribution lines that carry power using alternating current (AC) to a digital form. This input digital signal can be an oversampled digital signal, where the digital signal is oversampled relative to downstream processing (e.g., FFT-based processing). A processing circuit(s) can then be used to decimate the input digital signal according to a decimation rate. A reference signal can be generated by the processing circuit that is responsive to the decimation rate. The processing circuit can also be used to detect a change in a phase difference between the AC and reference signal and to modify, in response to detecting a change in the phase difference, the decimation rate to counteract the detected change in the phase difference.
申请公布号 US8737555(B2) 申请公布日期 2014.05.27
申请号 US201113334522 申请日期 2011.12.22
申请人 HAUG STUART L.;WOLTER CHAD;JOHNSON BRYCE D.;LANDIS+GYR TECHNOLOGIES, LLC 发明人 HAUG STUART L.;WOLTER CHAD;JOHNSON BRYCE D.
分类号 H04L7/02 主分类号 H04L7/02
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