发明名称 Internal voltage generation circuit of semiconductor memory device, and semiconductor memory device
摘要 An internal voltage generation circuit includes a vblh voltage generation circuit that generates a voltage vblh that is supplied as a high-voltage power supply of a sense amplifier, and a voltage distribution control circuit that has a first current source that pulls down an output node and a second current source that pulls up the output node. The output node is pulled down by the first current source operating, and the voltage thereof is maintained at a voltage that corresponds to a lower limit of a detection voltage value. The output node is pulled up by the second current source operating, and the voltage thereof is maintained at a voltage that corresponds to an upper limit of the detection voltage value.
申请公布号 US8737142(B2) 申请公布日期 2014.05.27
申请号 US201213691298 申请日期 2012.11.30
申请人 FUJITSU SEMICONDUCTOR LIMITED 发明人 SATO TAKAHIKO
分类号 G11C5/14 主分类号 G11C5/14
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