MEMORY CONTROLLER AND MEMROY SYSTEM INCLUDING ECC ENCODER FOR GENERATING NEW PARITY

摘要

The present invention relates to a memory controller which generates a new parity when a part of data of a memory device is changed. The memory controller according to an embodiment of the present invention comprises: a data location identifier for identifying a location of the part of data changed; a data difference calculator which receives the location of the part of data changed from the data location identifier and calculates a data difference (Ddif) between a new data (Dnew) inputted from a host and an existing data (Dold) inputted from the memory device; and a parity calculator which calculates a new parity (Pnew) by using an existing parity (Pold) stored in the memory device and the data difference (Ddif). According to the present invention, a time to read data, a time to generate a parity, and power consumption can be reduced since a parity is calculated only by using a changed data.