Static RAM cell matrix, has read transistor comprising source connected to line of reading words, and second read transistor comprising gate connected to second line of reading words and source connected to line of reading bits

摘要

The matrix has RAM cells comprising pass gate transistors (2) whose drains are connected with reversers (1). First and second read transistors (6, 7) are connected in series. A source of the second read transistor and a gate of the first transistor are connected to a drain of the first read transistor and a junction point of the reversers. A source of the first read transistor is connected to a first line (208) of read words, and a gate of the second read transistor is connected to a second line (210) of read words. The source of the second read transistor is connected to line of read bits.