发明名称 METHOD TO IMPROVE CHARGE TRAP FLASH MEMORY CORE CELL PERFORMANCE AND RELIABILITY
摘要 <p>A semiconductor processing method to provide a high quality bottom oxide layer and top oxide layer in a charged-trapping NAND and NOR flash memory. Both the bottom oxide layer and the top oxide layer of NAND and NOR flash memory determines array device performance and reliability. The method describes overcomes the corner thinning issue and the poor top oxide quality that results from the traditional oxidation approach of using pre-deposited silicon-rich nitride.</p>
申请公布号 WO2014078795(A1) 申请公布日期 2014.05.22
申请号 WO2013US70579 申请日期 2013.11.18
申请人 SPANSION LLC 发明人 CHEN, TUNG-SHENG;FANG, SHENQING
分类号 H01L27/115 主分类号 H01L27/115
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