发明名称 |
SYSTEMS AND METHODS FOR IMPROVING PROCESSOR EFFICIENCY THROUGH CACHING |
摘要 |
Certain embodiments herein relate to using tagless access buffers (TABs) to optimize energy efficiency in various computing systems. Candidate memory references in an L1 data cache may be identified and stored in the TAB. Various techniques may be implemented for identifying the candidate references and allocating the references into the TAB. Groups of memory references may also be allocate to a single TAB entry or may be allocated to an extra TAB entry (such that two lines in the TAB may be used to store L1 data cache lines), for example, when a strided access pattern spans two consecutive L1 data cache lines. Certain other embodiments are related to data filter cache and multi-issue tagless hit instruction cache (TH-IC) techniques. |
申请公布号 |
US2014143494(A1) |
申请公布日期 |
2014.05.22 |
申请号 |
US201314084433 |
申请日期 |
2013.11.19 |
申请人 |
FLORIDA STATE UNIVERSITY RESEARCH FOUNDATION, INC. |
发明人 |
WHALLEY DAVID;SJALANDER HANS MAGNUS;BARDIZBANYAN ALEN;LARSSON-EDEFORS PER;GAVIN PETER |
分类号 |
G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|