| 摘要 |
<p>PROBLEM TO BE SOLVED: To ensure that a client data write or read operation will not occur at the side of a demapping FIFO without resetting the demapping FIFO.SOLUTION: A clock generation device is configured in such a way that a frequency division signal derived by dividing a line clock during the enable period of an enable signal cycle, the line clock having been increased or reduced according to the usage amount of a FIFO in which client data is stored, is allowed to be fed into a phase comparator (24) which compares a phase difference with a frequency division signal derived by dividing a client clock by a fixed rate, and a client clock generation circuit (20) outputs a high-frequency client clock when the FIFO usage amount is large or a low-frequency client clock when the FIFO usage amount is small.</p> |
