发明名称 FIELD EFFECT TRANSISTOR
摘要 The following layers are deposited above the upper surface of a base substrate in this order with a lattice relaxation layer therebetween: a lower barrier layer made of AlxGa1-xN (0<x≰0.20), a channel layer made of GaN, and an upper barrier layer made of AlyGa1-yN (0.15≰y≰0.30, where x<y). A drain electrode, a source electrode, and an insulating layer are placed on the upper surface of the upper barrier layer. Furthermore, a gate electrode is placed in a position spaced with the insulating layer. A recessed structure is placed directly under the gate electrode. The channel layer includes an n-type doped second channel sub-layer and undoped first channel sub-layer deposited on the lower barrier layer in that order. The bottom of the recessed structure is within the heightwise range of the first channel sub-layer.
申请公布号 US2014138743(A1) 申请公布日期 2014.05.22
申请号 US201414162681 申请日期 2014.01.23
申请人 MURATA MANUFACTURING CO., LTD. 发明人 SAEKI HIROMASA
分类号 H01L29/10;H01L29/778 主分类号 H01L29/10
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