发明名称 LEADFRAME AREA ARRAY PACKAGING TECHNOLOGY
摘要 Embodiments of the present invention are directed to leadframe area array packaging technology for fabricating an area array of I/O contacts. A manufactured package includes a polymer material substrate, an interconnect layer positioned on top of the polymer material substrate, a die coupled to the interconnect layer via wire bonds or conductive pillars, and a molding compound encapsulating the die, the interconnect layer and the wire bonds or conductive pillars. The polymer material is typically formed on a carrier before assembly and is not removed to act as the substrate of the manufactured package. The polymer material substrate has a plurality of through holes that exposes the interconnect layer at predetermined locations and enables solder ball mounting or solder printing directly to the interconnect layer. In some embodiments, the semiconductor package includes a relief channel in the polymer material substrate to improve the reliability performance of the manufactured package.
申请公布号 US2014138808(A1) 申请公布日期 2014.05.22
申请号 US201213681302 申请日期 2012.11.19
申请人 DIMAANO, JR. ANTONIO BAMBALAN;SUTHIWONGSUNTHORN NATHAPONG;YANG YONG BO;UNITED TEST AND ASSEMBLY CENTER LTD. 发明人 DIMAANO, JR. ANTONIO BAMBALAN;SUTHIWONGSUNTHORN NATHAPONG;YANG YONG BO
分类号 H01L21/78;H01L21/50;H01L23/495 主分类号 H01L21/78
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