发明名称 |
RECEIVER WITH CLOCK RECOVERY CIRCUIT AND ADAPTIVE SAMPLE AND EQUALIZER TIMING |
摘要 |
A receiver is equipped with an adaptive phase-offset controller and associated timing-calibration circuitry that together shift the timing for a data sampler and a digital equalizer. The sample and equalizer timing is shifted to a position with less residual inter-symbol interference (ISI) energy relative to the current symbol. The shifted position may be calculated using a measure of signal quality, such as a receiver bit-error rate or a comparison of filter-tap values, to optimize the timing of data recovery. |
申请公布号 |
EP2115929(B1) |
申请公布日期 |
2014.05.21 |
申请号 |
EP20070853389 |
申请日期 |
2007.12.13 |
申请人 |
RAMBUS INC. |
发明人 |
LIN, QI;LEIBOWITZ, BRIAN;LEE, HAE-CHANG;REN, JIHONG;OH, KYUNG, SUK;ZERBE, JARED |
分类号 |
H04L7/02;H04L7/00;H04L7/033;H04L25/03 |
主分类号 |
H04L7/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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