发明名称 TEST COUPON FOR MANAGING CHARACTERISTIC IMPEDANCE AND PRINT CIRCUIT BOARD WITH THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a test coupon for managing a characteristic impedance (Z0) that allows the Z0 of wiring inside and outside a BGA (Ball Grid Array) in a product region to be confirmed and managed even when manufacturing factors such as fluidity of etchant vary.SOLUTION: In the test coupon for managing a characteristic impedance formed within a test coupon region on a print circuit board, first wiring under a first design rule has a first straight part, second wiring under the first design rule has a second straight line that is approximately perpendicular to the first straight part, and third wiring under a second design rule has a third straight part that is approximately perpendicular to any one of the first straight part and the second straight part, where the first wiring, second wiring, and third wiring are connected in series.
申请公布号 JP2014093340(A) 申请公布日期 2014.05.19
申请号 JP20120241605 申请日期 2012.11.01
申请人 NEC CORP 发明人 TANABE MOTOI
分类号 H05K1/02;G01R27/02;H05K3/00 主分类号 H05K1/02
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